/mmixware/branches/alex/mmixal.w
3327,7 → 3327,7
char listing_name[FILENAME_MAX+1]; /* name of the optional listing file */
FILE *src_file, *obj_file, *listing_file;
int expanding; /* are we expanding instructions when base address fail? */
int check_X_BIT; /* are we checking the X_BIT when reading floating point constants? */
int check_X_BIT; /* are we checking the |X_BIT| when reading floating point constants? */
int buf_size; /* maximum number of characters per line of input */
 
@ @<Init...@>=
/mmixware/branches/alex/mmix-config.w
446,53 → 446,53
@<Glob...@>=
int fetch_buf_size,write_buf_size,reorder_buf_size,mem_bus_bytes,hardware_PT;
int max_cycs=60;
pv_spec PV[]={@/
{"fetchbuffer", &fetch_buf_size, 4, 1, INT_MAX, false},@/
{"writebuffer", &write_buf_size, 2, 1, INT_MAX, false},@/
{"reorderbuffer", &reorder_buf_size, 5, 1, INT_MAX, false},@/
{"renameregs", &max_rename_regs, 5, 1, INT_MAX, false},@/
{"memslots", &max_mem_slots, 2, 1, INT_MAX, false},@/
{"localregs", &lring_size, 256, 256, 1024, true},@/
{"fetchmax", &fetch_max, 2, 1, INT_MAX, false},@/
{"dispatchmax", &dispatch_max, 1, 1, INT_MAX, false},@/
{"peekahead", &peekahead, 1, 0, INT_MAX, false},@/
{"commitmax", &commit_max, 1, 1, INT_MAX, false},@/
{"fremmax", &frem_max, 1, 1, INT_MAX, false},@/
{"denin",&denin_penalty, 1, 0, INT_MAX, false},@/
{"denout",&denout_penalty, 1, 0, INT_MAX, false},@/
{"writeholdingtime", &holding_time, 0, 0, INT_MAX, false},@/
{"memaddresstime", &mem_addr_time, 20, 1, INT_MAX, false},@/
{"memreadtime", &mem_read_time, 20, 1, INT_MAX, false},@/
{"memwritetime", &mem_write_time, 20, 1, INT_MAX, false},@/
{"membusbytes", &mem_bus_bytes, 8, 8, INT_MAX, true},@/
{"branchpredictbits", &bp_n, 0, 0, 8, false},@/
{"branchaddressbits", &bp_a, 0, 0, 32, false},@/
{"branchhistorybits", &bp_b, 0, 0, 32, false},@/
{"branchdualbits", &bp_c, 0, 0, 32, false},@/
{"hardwarepagetable", &hardware_PT, 1, 0, 1, false},@/
{"disablesecurity", (int*)&security_disabled, 0, 0, 1, false},@/
{"memchunksmax", &mem_chunks_max, 1000, 1, INT_MAX, false},@/
pv_spec PV[]={@|
{"fetchbuffer", &fetch_buf_size, 4, 1, INT_MAX, false},@|
{"writebuffer", &write_buf_size, 2, 1, INT_MAX, false},@|
{"reorderbuffer", &reorder_buf_size, 5, 1, INT_MAX, false},@|
{"renameregs", &max_rename_regs, 5, 1, INT_MAX, false},@|
{"memslots", &max_mem_slots, 2, 1, INT_MAX, false},@|
{"localregs", &lring_size, 256, 256, 1024, true},@|
{"fetchmax", &fetch_max, 2, 1, INT_MAX, false},@|
{"dispatchmax", &dispatch_max, 1, 1, INT_MAX, false},@|
{"peekahead", &peekahead, 1, 0, INT_MAX, false},@|
{"commitmax", &commit_max, 1, 1, INT_MAX, false},@|
{"fremmax", &frem_max, 1, 1, INT_MAX, false},@|
{"denin",&denin_penalty, 1, 0, INT_MAX, false},@|
{"denout",&denout_penalty, 1, 0, INT_MAX, false},@|
{"writeholdingtime", &holding_time, 0, 0, INT_MAX, false},@|
{"memaddresstime", &mem_addr_time, 20, 1, INT_MAX, false},@|
{"memreadtime", &mem_read_time, 20, 1, INT_MAX, false},@|
{"memwritetime", &mem_write_time, 20, 1, INT_MAX, false},@|
{"membusbytes", &mem_bus_bytes, 8, 8, INT_MAX, true},@|
{"branchpredictbits", &bp_n, 0, 0, 8, false},@|
{"branchaddressbits", &bp_a, 0, 0, 32, false},@|
{"branchhistorybits", &bp_b, 0, 0, 32, false},@|
{"branchdualbits", &bp_c, 0, 0, 32, false},@|
{"hardwarepagetable", &hardware_PT, 1, 0, 1, false},@|
{"disablesecurity", (int*)&security_disabled, 0, 0, 1, false},@|
{"memchunksmax", &mem_chunks_max, 1000, 1, INT_MAX, false},@|
{"hashprime", &hash_prime, 2003, 2, INT_MAX, false}};
@#
cpv_spec CPV[]={
{"associativity", assoc, 1, 1, INT_MAX, true},@/
{"blocksize", blksz, 8, 8, 8192, true},@/
{"setsize", setsz, 1, 1, INT_MAX, true},@/
{"granularity", gran, 8, 8, 8192, true},@/
{"victimsize", vctsz, 0, 0, INT_MAX, true},@/
{"writeback", wrb, 0, 0, 1,false},@/
{"writeallocate", wra, 0, 0, 1,false},@/
{"accesstime", acctm, 1, 1, INT_MAX, false},@/
{"copyintime", citm, 1, 1, INT_MAX, false},@/
{"copyouttime", cotm, 1, 1, INT_MAX, false},@/
cpv_spec CPV[]={@|
{"associativity", assoc, 1, 1, INT_MAX, true},@|
{"blocksize", blksz, 8, 8, 8192, true},@|
{"setsize", setsz, 1, 1, INT_MAX, true},@|
{"granularity", gran, 8, 8, 8192, true},@|
{"victimsize", vctsz, 0, 0, INT_MAX, true},@|
{"writeback", wrb, 0, 0, 1,false},@|
{"writeallocate", wra, 0, 0, 1,false},@|
{"accesstime", acctm, 1, 1, INT_MAX, false},@|
{"copyintime", citm, 1, 1, INT_MAX, false},@|
{"copyouttime", cotm, 1, 1, INT_MAX, false},@|
{"ports", prts, 1, 1, INT_MAX,false}};
@#
op_spec OP[]={
op_spec OP[]={@|
{"mul0", mul0, 10},
{"mul1", mul1, 10},
{"mul2", mul2, 10},
{"mul3", mul3, 10},
{"mul4", mul4, 10},
{"mul4", mul4, 10},@|
{"mul5", mul5, 10},
{"mul6", mul6, 10},
{"mul7", mul7, 10},
762,38 → 762,38
|fsub| by |fadd|, etc.
 
@<Glob...@>=
internal_opcode int_op[256]={@/
trap,fcmp,funeq,funeq,fadd,fix,fadd,fix,@/
flot,flot,flot,flot,flot,flot,flot,flot,@/
fmul,feps,feps,feps,fdiv,fsqrt,frem,fint,@/
mul,mul,mul,mul,div,div,div,div,@/
add,add,addu,addu,sub,sub,subu,subu,@/
addu,addu,addu,addu,addu,addu,addu,addu,@/
cmp,cmp,cmpu,cmpu,sub,sub,subu,subu,@/
sh,sh,sh,sh,sh,sh,sh,sh,@/
br,br,br,br,br,br,br,br,@/
br,br,br,br,br,br,br,br,@/
pbr,pbr,pbr,pbr,pbr,pbr,pbr,pbr,@/
pbr,pbr,pbr,pbr,pbr,pbr,pbr,pbr,@/
cset,cset,cset,cset,cset,cset,cset,cset,@/
cset,cset,cset,cset,cset,cset,cset,cset,@/
zset,zset,zset,zset,zset,zset,zset,zset,@/
zset,zset,zset,zset,zset,zset,zset,zset,@/
ld,ld,ld,ld,ld,ld,ld,ld,@/
ld,ld,ld,ld,ld,ld,ld,ld,@/
ld,ld,ld,ld,ld,ld,ld,ld,@/
ld,ld,ld,ld,prego,prego,go,go,@/
st,st,st,st,st,st,st,st,@/
st,st,st,st,st,st,st,st,@/
st,st,st,st,st,st,st,st,@/
st,st,st,st,st,st,pushgo,pushgo,@/
or,or,orn,orn,nor,nor,xor,xor,@/
and,and,andn,andn,nand,nand,nxor,nxor,@/
bdif,bdif,wdif,wdif,tdif,tdif,odif,odif,@/
mux,mux,sadd,sadd,mor,mor,mor,mor,@/
set,set,set,set,addu,addu,addu,addu,@/
or,or,or,or,andn,andn,andn,andn,@/
noop,noop,pushj,pushj,set,set,put,put,@/
internal_opcode int_op[256]={@|
trap,fcmp,funeq,funeq,fadd,fix,fadd,fix,@|
flot,flot,flot,flot,flot,flot,flot,flot,@|
fmul,feps,feps,feps,fdiv,fsqrt,frem,fint,@|
mul,mul,mul,mul,div,div,div,div,@|
add,add,addu,addu,sub,sub,subu,subu,@|
addu,addu,addu,addu,addu,addu,addu,addu,@|
cmp,cmp,cmpu,cmpu,sub,sub,subu,subu,@|
sh,sh,sh,sh,sh,sh,sh,sh,@|
br,br,br,br,br,br,br,br,@|
br,br,br,br,br,br,br,br,@|
pbr,pbr,pbr,pbr,pbr,pbr,pbr,pbr,@|
pbr,pbr,pbr,pbr,pbr,pbr,pbr,pbr,@|
cset,cset,cset,cset,cset,cset,cset,cset,@|
cset,cset,cset,cset,cset,cset,cset,cset,@|
zset,zset,zset,zset,zset,zset,zset,zset,@|
zset,zset,zset,zset,zset,zset,zset,zset,@|
ld,ld,ld,ld,ld,ld,ld,ld,@|
ld,ld,ld,ld,ld,ld,ld,ld,@|
ld,ld,ld,ld,ld,ld,ld,ld,@|
ld,ld,ld,ld,prego,prego,go,go,@|
st,st,st,st,st,st,st,st,@|
st,st,st,st,st,st,st,st,@|
st,st,st,st,st,st,st,st,@|
st,st,st,st,st,st,pushgo,pushgo,@|
or,or,orn,orn,nor,nor,xor,xor,@|
and,and,andn,andn,nand,nand,nxor,nxor,@|
bdif,bdif,wdif,wdif,tdif,tdif,odif,odif,@|
mux,mux,sadd,sadd,mor,mor,mor,mor,@|
set,set,set,set,addu,addu,addu,addu,@|
or,or,or,or,andn,andn,andn,andn,@|
noop,noop,pushj,pushj,set,set,put,put,@|
pop,resume,save,unsave,sync,noop,get,trip};
int int_stages[max_real_command+1];
/* stages as function of |internal_opcode| */
/mmixware/branches/alex/mmix-sim.w
2084,13 → 2084,13
the contents of register~X on the \.{CS} operations.
 
@<Cases for ind...@>=
case CSN: case CSNI: case CSZ: case CSZI:@/
case CSP: case CSPI: case CSOD: case CSODI:@/
case CSNN: case CSNNI: case CSNZ: case CSNZI:@/
case CSNP: case CSNPI: case CSEV: case CSEVI:@/
case ZSN: case ZSNI: case ZSZ: case ZSZI:@/
case ZSP: case ZSPI: case ZSOD: case ZSODI:@/
case ZSNN: case ZSNNI: case ZSNZ: case ZSNZI:@/
case CSN: case CSNI: case CSZ: case CSZI:@/@t\4@>
case CSP: case CSPI: case CSOD: case CSODI:@/@t\4@>
case CSNN: case CSNNI: case CSNZ: case CSNZI:@/@t\4@>
case CSNP: case CSNPI: case CSEV: case CSEVI:@/@t\4@>
case ZSN: case ZSNI: case ZSZ: case ZSZI:@/@t\4@>
case ZSP: case ZSPI: case ZSOD: case ZSODI:@/@t\4@>
case ZSNN: case ZSNNI: case ZSNZ: case ZSNZI:@/@t\4@>
case ZSNP: case ZSNPI: case ZSEV: case ZSEVI:@/
x=register_truth(y,op)? z: b;@+goto store_x;
 
2098,13 → 2098,13
We get to do it one more time. Happiness!
 
@<Cases for ind...@>=
case BN: case BNB: case BZ: case BZB:@/
case BP: case BPB: case BOD: case BODB:@/
case BNN: case BNNB: case BNZ: case BNZB:@/
case BNP: case BNPB: case BEV: case BEVB:@/
case PBN: case PBNB: case PBZ: case PBZB:@/
case PBP: case PBPB: case PBOD: case PBODB:@/
case PBNN: case PBNNB: case PBNZ: case PBNZB:@/
case BN: case BNB: case BZ: case BZB:@/@t\4@>
case BP: case BPB: case BOD: case BODB:@/@t\4@>
case BNN: case BNNB: case BNZ: case BNZB:@/@t\4@>
case BNP: case BNPB: case BEV: case BEVB:@/@t\4@>
case PBN: case PBNB: case PBZ: case PBZB:@/@t\4@>
case PBP: case PBPB: case PBOD: case PBODB:@/@t\4@>
case PBNN: case PBNNB: case PBNZ: case PBNZB:@/@t\4@>
case PBNP: case PBNPB: case PBEV: case PBEVB:@/
x.l=register_truth(b,op);
if (x.l) {
2998,7 → 2998,7
bool profiling; /* should we print the profile at the end? */
FILE *fake_stdin; /* file substituted for the simulated \.{StdIn} */
FILE *dump_file; /* file used for binary dumps */
char *usage_help[]={@/
char *usage_help[]={@|
" with these options: (<n>=decimal number, <x>=hex number)\n",@|
"-t<n> trace each instruction the first n times\n",@|
"-e<x> trace each instruction with an exception matching x\n",@|
3014,9 → 3014,9
"-b<n> change the buffer size for source lines\n",@|
"-c<n> change the cyclic local register ring size\n",@|
"-f<filename> use given file to simulate standard input\n",@|
"-D<filename> dump a file for use by other simulators\n",@|
"-D<filename> dump a file for use by other simulators\n",@+
""};
char *interactive_help[]={@/
char *interactive_help[]={@|
"The interactive commands are:\n",@|
"<return> trace one instruction\n",@|
"n trace one instruction\n",@|
3042,7 → 3042,7
"B show all current breakpoints and tracepoints\n",@|
"i<file> insert commands from file\n",@|
"-<option> change a tracing/listing/profile option\n",@|
"-? show the tracing/listing/profile options \n",@|
"-? show the tracing/listing/profile options \n",@+
""};
 
@ @<Open a file for simulated standard input@>=
/mmixware/branches/alex/mmix-pipe.w
847,38 → 847,38
@!POP,@!RESUME,@!SAVE,@!UNSAVE,@!SYNC,@!SWYM,@!GET,@!TRIP}@+@!mmix_opcode;
 
@ @<Glob...@>=
char *opcode_name[]={
"TRAP","FCMP","FUN","FEQL","FADD","FIX","FSUB","FIXU",@/
"FLOT","FLOTI","FLOTU","FLOTUI","SFLOT","SFLOTI","SFLOTU","SFLOTUI",@/
"FMUL","FCMPE","FUNE","FEQLE","FDIV","FSQRT","FREM","FINT",@/
"MUL","MULI","MULU","MULUI","DIV","DIVI","DIVU","DIVUI",@/
"ADD","ADDI","ADDU","ADDUI","SUB","SUBI","SUBU","SUBUI",@/
"2ADDU","2ADDUI","4ADDU","4ADDUI","8ADDU","8ADDUI","16ADDU","16ADDUI",@/
"CMP","CMPI","CMPU","CMPUI","NEG","NEGI","NEGU","NEGUI",@/
"SL","SLI","SLU","SLUI","SR","SRI","SRU","SRUI",@/
"BN","BNB","BZ","BZB","BP","BPB","BOD","BODB",@/
"BNN","BNNB","BNZ","BNZB","BNP","BNPB","BEV","BEVB",@/
"PBN","PBNB","PBZ","PBZB","PBP","PBPB","PBOD","PBODB",@/
"PBNN","PBNNB","PBNZ","PBNZB","PBNP","PBNPB","PBEV","PBEVB",@/
"CSN","CSNI","CSZ","CSZI","CSP","CSPI","CSOD","CSODI",@/
"CSNN","CSNNI","CSNZ","CSNZI","CSNP","CSNPI","CSEV","CSEVI",@/
"ZSN","ZSNI","ZSZ","ZSZI","ZSP","ZSPI","ZSOD","ZSODI",@/
"ZSNN","ZSNNI","ZSNZ","ZSNZI","ZSNP","ZSNPI","ZSEV","ZSEVI",@/
"LDB","LDBI","LDBU","LDBUI","LDW","LDWI","LDWU","LDWUI",@/
"LDT","LDTI","LDTU","LDTUI","LDO","LDOI","LDOU","LDOUI",@/
"LDSF","LDSFI","LDHT","LDHTI","CSWAP","CSWAPI","LDUNC","LDUNCI",@/
"LDVTS","LDVTSI","PRELD","PRELDI","PREGO","PREGOI","GO","GOI",@/
"STB","STBI","STBU","STBUI","STW","STWI","STWU","STWUI",@/
"STT","STTI","STTU","STTUI","STO","STOI","STOU","STOUI",@/
"STSF","STSFI","STHT","STHTI","STCO","STCOI","STUNC","STUNCI",@/
"SYNCD","SYNCDI","PREST","PRESTI","SYNCID","SYNCIDI","PUSHGO","PUSHGOI",@/
"OR","ORI","ORN","ORNI","NOR","NORI","XOR","XORI",@/
"AND","ANDI","ANDN","ANDNI","NAND","NANDI","NXOR","NXORI",@/
"BDIF","BDIFI","WDIF","WDIFI","TDIF","TDIFI","ODIF","ODIFI",@/
"MUX","MUXI","SADD","SADDI","MOR","MORI","MXOR","MXORI",@/
"SETH","SETMH","SETML","SETL","INCH","INCMH","INCML","INCL",@/
"ORH","ORMH","ORML","ORL","ANDNH","ANDNMH","ANDNML","ANDNL",@/
"JMP","JMPB","PUSHJ","PUSHJB","GETA","GETAB","PUT","PUTI",@/
char *opcode_name[]={@|
"TRAP","FCMP","FUN","FEQL","FADD","FIX","FSUB","FIXU",@|
"FLOT","FLOTI","FLOTU","FLOTUI","SFLOT","SFLOTI","SFLOTU","SFLOTUI",@|
"FMUL","FCMPE","FUNE","FEQLE","FDIV","FSQRT","FREM","FINT",@|
"MUL","MULI","MULU","MULUI","DIV","DIVI","DIVU","DIVUI",@|
"ADD","ADDI","ADDU","ADDUI","SUB","SUBI","SUBU","SUBUI",@|
"2ADDU","2ADDUI","4ADDU","4ADDUI","8ADDU","8ADDUI","16ADDU","16ADDUI",@|
"CMP","CMPI","CMPU","CMPUI","NEG","NEGI","NEGU","NEGUI",@|
"SL","SLI","SLU","SLUI","SR","SRI","SRU","SRUI",@|
"BN","BNB","BZ","BZB","BP","BPB","BOD","BODB",@|
"BNN","BNNB","BNZ","BNZB","BNP","BNPB","BEV","BEVB",@|
"PBN","PBNB","PBZ","PBZB","PBP","PBPB","PBOD","PBODB",@|
"PBNN","PBNNB","PBNZ","PBNZB","PBNP","PBNPB","PBEV","PBEVB",@|
"CSN","CSNI","CSZ","CSZI","CSP","CSPI","CSOD","CSODI",@|
"CSNN","CSNNI","CSNZ","CSNZI","CSNP","CSNPI","CSEV","CSEVI",@|
"ZSN","ZSNI","ZSZ","ZSZI","ZSP","ZSPI","ZSOD","ZSODI",@|
"ZSNN","ZSNNI","ZSNZ","ZSNZI","ZSNP","ZSNPI","ZSEV","ZSEVI",@|
"LDB","LDBI","LDBU","LDBUI","LDW","LDWI","LDWU","LDWUI",@|
"LDT","LDTI","LDTU","LDTUI","LDO","LDOI","LDOU","LDOUI",@|
"LDSF","LDSFI","LDHT","LDHTI","CSWAP","CSWAPI","LDUNC","LDUNCI",@|
"LDVTS","LDVTSI","PRELD","PRELDI","PREGO","PREGOI","GO","GOI",@|
"STB","STBI","STBU","STBUI","STW","STWI","STWU","STWUI",@|
"STT","STTI","STTU","STTUI","STO","STOI","STOU","STOUI",@|
"STSF","STSFI","STHT","STHTI","STCO","STCOI","STUNC","STUNCI",@|
"SYNCD","SYNCDI","PREST","PRESTI","SYNCID","SYNCIDI","PUSHGO","PUSHGOI",@|
"OR","ORI","ORN","ORNI","NOR","NORI","XOR","XORI",@|
"AND","ANDI","ANDN","ANDNI","NAND","NANDI","NXOR","NXORI",@|
"BDIF","BDIFI","WDIF","WDIFI","TDIF","TDIFI","ODIF","ODIFI",@|
"MUX","MUXI","SADD","SADDI","MOR","MORI","MXOR","MXORI",@|
"SETH","SETMH","SETML","SETL","INCH","INCMH","INCML","INCL",@|
"ORH","ORMH","ORML","ORL","ANDNH","ANDNMH","ANDNML","ANDNL",@|
"JMP","JMPB","PUSHJ","PUSHJB","GETA","GETAB","PUT","PUTI",@|
"POP","RESUME","SAVE","UNSAVE","SYNC","SWYM","GET","TRIP"};
 
@ And here is a (likewise boring) list of all the internal opcodes.
1084,38 → 1084,38
internal ones.
 
@<Glob...@>=
internal_opcode internal_op[256]={@/
trap,fcmp,funeq,funeq,fadd,fix,fsub,fix,@/
flot,flot,flot,flot,flot,flot,flot,flot,@/
fmul,feps,feps,feps,fdiv,fsqrt,frem,fint,@/
mul,mul,mulu,mulu,div,div,divu,divu,@/
add,add,addu,addu,sub,sub,subu,subu,@/
addu,addu,addu,addu,addu,addu,addu,addu,@/
cmp,cmp,cmpu,cmpu,sub,sub,subu,subu,@/
shl,shl,shlu,shlu,shr,shr,shru,shru,@/
br,br,br,br,br,br,br,br,@/
br,br,br,br,br,br,br,br,@/
pbr,pbr,pbr,pbr,pbr,pbr,pbr,pbr,@/
pbr,pbr,pbr,pbr,pbr,pbr,pbr,pbr,@/
cset,cset,cset,cset,cset,cset,cset,cset,@/
cset,cset,cset,cset,cset,cset,cset,cset,@/
zset,zset,zset,zset,zset,zset,zset,zset,@/
zset,zset,zset,zset,zset,zset,zset,zset,@/
ld,ld,ld,ld,ld,ld,ld,ld,@/
ld,ld,ld,ld,ld,ld,ld,ld,@/
ld,ld,ld,ld,cswap,cswap,ldunc,ldunc,@/
ldvts,ldvts,preld,preld,prego,prego,go,go,@/
pst,pst,pst,pst,pst,pst,pst,pst,@/
pst,pst,pst,pst,st,st,st,st,@/
pst,pst,pst,pst,st,st,st,st,@/
syncd,syncd,prest,prest,syncid,syncid,pushgo,pushgo,@/
or,or,orn,orn,nor,nor,xor,xor,@/
and,and,andn,andn,nand,nand,nxor,nxor,@/
bdif,bdif,wdif,wdif,tdif,tdif,odif,odif,@/
mux,mux,sadd,sadd,mor,mor,mor,mor,@/
set,set,set,set,addu,addu,addu,addu,@/
or,or,or,or,andn,andn,andn,andn,@/
jmp,jmp,pushj,pushj,set,set,put,put,@/
internal_opcode internal_op[256]={@|
trap,fcmp,funeq,funeq,fadd,fix,fsub,fix,@|
flot,flot,flot,flot,flot,flot,flot,flot,@|
fmul,feps,feps,feps,fdiv,fsqrt,frem,fint,@|
mul,mul,mulu,mulu,div,div,divu,divu,@|
add,add,addu,addu,sub,sub,subu,subu,@|
addu,addu,addu,addu,addu,addu,addu,addu,@|
cmp,cmp,cmpu,cmpu,sub,sub,subu,subu,@|
shl,shl,shlu,shlu,shr,shr,shru,shru,@|
br,br,br,br,br,br,br,br,@|
br,br,br,br,br,br,br,br,@|
pbr,pbr,pbr,pbr,pbr,pbr,pbr,pbr,@|
pbr,pbr,pbr,pbr,pbr,pbr,pbr,pbr,@|
cset,cset,cset,cset,cset,cset,cset,cset,@|
cset,cset,cset,cset,cset,cset,cset,cset,@|
zset,zset,zset,zset,zset,zset,zset,zset,@|
zset,zset,zset,zset,zset,zset,zset,zset,@|
ld,ld,ld,ld,ld,ld,ld,ld,@|
ld,ld,ld,ld,ld,ld,ld,ld,@|
ld,ld,ld,ld,cswap,cswap,ldunc,ldunc,@|
ldvts,ldvts,preld,preld,prego,prego,go,go,@|
pst,pst,pst,pst,pst,pst,pst,pst,@|
pst,pst,pst,pst,st,st,st,st,@|
pst,pst,pst,pst,st,st,st,st,@|
syncd,syncd,prest,prest,syncid,syncid,pushgo,pushgo,@|
or,or,orn,orn,nor,nor,xor,xor,@|
and,and,andn,andn,nand,nand,nxor,nxor,@|
bdif,bdif,wdif,wdif,tdif,tdif,odif,odif,@|
mux,mux,sadd,sadd,mor,mor,mor,mor,@|
set,set,set,set,addu,addu,addu,addu,@|
or,or,or,or,andn,andn,andn,andn,@|
jmp,jmp,pushj,pushj,set,set,put,put,@|
pop,resume,save,unsave,sync,noop,get,trip};
 
@ While we're into boring lists, we might as well define all the
1745,7 → 1745,7
@d ctl_change_bit 0x80
 
@<Glob...@>=
unsigned char flags[256]={
unsigned char flags[256]={@|@t\1\1@>
0x8a, 0x2a, 0x2a, 0x2a, 0x2a, 0x26, 0x2a, 0x26, /* \.{TRAP}, \dots\ */
0x26, 0x25, 0x26, 0x25, 0x26, 0x25, 0x26, 0x25, /* \.{FLOT}, \dots\ */
0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x26, 0x2a, 0x26, /* \.{FMUL}, \dots\ */
2062,7 → 2062,7
that register is listed in the |third_operand| table.
 
@<Glob...@>=
unsigned char third_operand[256]={@/
unsigned char third_operand[256]={@|@t\1\1@>
0,rA,0,0,rA,rA,rA,rA, /* \.{TRAP}, \dots\ */
rA,rA,rA,rA,rA,rA,rA,rA, /* \.{FLOT}, \dots\ */
rA,rE,rE,rE,rA,rA,rA,rA, /* \.{FMUL}, \dots\ */
/mmixware/branches/alex
Property changes:
Modified: svn:mergeinfo
Merged /mmixware/trunk:r153-159