<<<--- % Author M.Ruckert LOC #100 u1 IS $0 1. parameter u0 IS $1 1. parameter v1 IS $2 2. parameter v0 IS $3 2. parameter w1 IS $4 return value w0 IS $5 return value s IS $6 $w$ unpacked e IS $7 carry IS $8 The shuttle between $x_1$ and $x_0$. su IS $9 $u$ unpacked eu IS $10 sv IS $11 $v$ unpacked ev IS $12 d IS $13 $e_u - e_v$ tmp IS $14 --->>> DFsub SETH tmp,#8000; XOR v1,v1,tmp Change sign of operand. DFadd SLU eu,u1,1; SLU ev,v1,1 Remove sign bit. CMPU tmp,eu,ev \ul{\sl A2.~Assume $e_u \ge e_v$.} BP tmp,0F Branch if $ (e_u, u_1, u_0) \ge(e_v, v_1,v_0) $ BN tmp,1F; CMPU tmp,u0,v0; BNN tmp,0F 1H SET tmp,u1; SET u1,v1; SET v1,tmp else swap $u$ and $v$ SET tmp,u0; SET u0,v0; SET v0,tmp SLU eu,u1,1; SLU ev,v1,1 and remove sign bit again. 0H SRU eu,eu,49; SRU ev,ev,49 \ul{\sl A1.~Unpack.} SRU su,u1,63; SRU sv,v1,63 Get sign bit. ANDNH u1,#FFFF; ANDNH v1,#FFFF Remove sign and exponent bits. INCH u1,#0001; INCH v1,#0001 Add hidden bit. SET e,eu; SET s,su \ul{\sl A3.~Set $e_w \is e_u$.} SUB d,eu,ev \ul{\sl A4.~Test $e_u-e_v$.} CMP tmp,d,113+2; BN tmp,5F $e_u-e_v \ge p+2$ ? SET w1,u1; SET w0,u0 $w \is u$ JMP 7F 5H CMP tmp,d,64; BN tmp,0F \ul{\sl A5.~Scale right.} SET v0,v1; SET v1,0; SUB d,d,64 Truncating $v_0$ if $d\ge64$ 0H SRU v0,v0,d NEG tmp,64,d; SLU carry,v1,tmp OR v0,v0,carry; SRU v1,v1,d Shift $(v_1,v_0)$ to the right $e_u-e_v$ places CMP tmp,su,sv; BNZ tmp,0F Signs $s_u$ and $s_v$ differ. ADDU w0,u0,v0 \ul{\sl A6.~Add.} CMP tmp,w0,u0; ZSN carry,tmp,1 ADDU w1,u1,v1; ADDU w1,w1,carry JMP 7F 0H SUBU w0,u0,v0 \ul{\sl A6.~Subtract.} CMP tmp,w0,u0; ZSP carry,tmp,1 SUBU w1,u1,v1; SUBU w1,w1,carry OR tmp,w1,w0; BZ tmp,Error Result is zero. 7H IS @ \ul{\sl A7.~Normalize.} DNormalize SRU tmp,w1,49; BP tmp,4F \ul{\sl N1.~Test $f$.} If $w\ge 2$, scale right. OR tmp,w1,w0; BZ tmp,Error underflow 2H SRU tmp,w1,48; BP tmp,5F \ul{\sl N2.~Is $w$ normalized?} ZSN carry,w0,1; SLU w0,w0,1 \ul{\sl N3.~Scale left.} SLU w1,w1,1; ADDU w1,w1,carry SUB e,e,1 JMP 2B 4H AND carry,w1,1 \ul{\sl N4.~Scale right.} SLU carry,carry,63 SRU w0,w0,1; ADDU w0,w0,carry SRU w1,w1,1 ADD e,e,1 % \ul{\sl N5.~Round.} omitted 5H SET tmp,#7FFE; CMP tmp,e,tmp \ul{\sl N6.~Check $e$.} BP tmp,Error Overflow BNP e,Error Underflow SLU s,s,63 \ul{\sl N7.~Pack.} SLU e,e,48; ANDNH w1,#FFFF remove hidden bit OR w1,w1,s; OR w1,w1,e <<<--- SET $0,w0 SET $1,w1 POP 2,0 Main SETML $2,0 1.0 INCH $2,#3FFF+10 exponent 10 ORH $2,#8000 negativ SET $3,0 $2,$3 <- -1024.0 SETML $4,#0040 1.0000 0000 0100 0000 INCH $4,#3FFF+10 exponent 10 ORH $4,#0000 positive SET $5,0 $4,$5 <- +1025.0 PUSHJ $1,DFadd SET $255,0 TRAP 0,Halt,0 Error SET $255,1 TRAP 0,Halt,0 --->>>