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MMIX Bug
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Content

MMIXware Version

mmix-20110831

Bug Reported

Initial: 11/6/2011

Author

Eiji Yoshiya

Description

When SAVE instruction is executed in kernel mode, stack overflow interrupt occurs.

Details

When inserting incgamma instruction, stack_alert field is set to true. (mmix-pipw.w: line 2155.)
If rS is not negative(user space), stack_alert is set to false after checking protection bits. (mmix-pipw.w: line 4825.)
But if rS is negative(kernel space), stack_alert is never updated and remains true.
So, at the next instruction, stack oveflow interrupt occurs. (mmix-pipe.w: line 2730-3736.)

Proposed patch

Set stack_alert to false when rS is negative.

The following is my patch: 

@@ -4852,6 +4862,7 @@

 @ @<Do load/store stage~1 with known physical address@>=
 {@+octa *m;
+  data->stack_alert=false;
   if (!(data->loc.h&sign_bit)) {
     if (data->i==syncd || data->i==syncid) goto sync_check;
     if (data->i!=preld && data->i!=prest) data->interrupt |= N_BIT;

Discussion

I propose a different bug fix than Eiji Yoshiya: in line 4855 of mmix-pipe replace 
  cool->interim=cool->stack_alert=true;
by 
  cool->interim=true;
  cool->stack_alert=!(cool->y.o.h&sign_bit);
The semantics of stack_alert is given as bool stack_alert; /* is there potential for stack overflow? */ So it should not be set. The extra code will effect only the incgamma instruction and not all load/stores from physical addresses (as the patch proposed by Eiji Yoshiya.

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