MMIX Instruction Set

SYNC

SYNC XYZ

Timing:

1υ

Description:

Needed to synchronize processes. XYZ has a value from 0 to 7, where values greater 3 are reserved for the operating system.

Of course no SYNC is necessary between a command that loads from or stores into memory and a subsequent command that loads from or stores into exactly the same location. However, SYNC might be necessary in certain cases even on a one-processor system, because input/output processes take place in parallel with ordinary computation.
The cases XYZ > 3 are privileged, in the sense that only the operating system can use them. More precisely, if a SYNC command is encountered with XYZ = 4 or XYZ = 5 or XYZ = 6 or XYZ = 7, a "privileged instruction interrupt" occurs unless that interrupt is currently disabled. Only the operating system can disable interrupts

SYNC:

"Synchronize" XYZ = 0 the machine drains its pipeline (that is, it stalls until all preceding instructions have completed their activity). XYZ = 1 tthe machine controls its actions less drastically, in such a way that all store instructions preceding this SYNC will be completed before all store instructions after it. XYZ = 2 the machine controls its actions in such a way that all load instructions preceding this SYNC will be completed before all load instructions after it. XYZ = 3 the machine controls its actions in such a way that all load or store instructions preceding this SYNC will be completed before all load or store instructions after it. XYZ = 4 the machine goes into a power-saver mode, in which instructions may be executed more slowly (or not at all) until some kind of "wake-up" signal is received. XYZ = 5 the machine empties its write buffer and cleans its data caches, if any (including a possible secondary cache); the caches retain their data, but the cache contents also appear in memory. XYZ = 6 the machine clears its virtual address translation caches XYZ = 7 the machine clears its instruction and data caches, discarding any information in the data caches that wasn't previously in memory. ("Clearing" is stronger than "cleaning"; a clear cache remembers nothing. Clearing is also faster, because it simply obliterates everything.) XYZ > 7 an illegal instruction interrupt occurs.