MMIX Instruction Set

Unsigned Arithmetic

Specification:

ADDU: u($X)	← (u($Y) + u($Z)) mod 264
SUBU: u($X)	← (u($Y) -u($Z)) mod 264
MULU: u(rH $X)	← u($Y) * u($Z)
DIVU:	u($X) ← ⌊u(rD $Y) / u($Z)⌋ if u($Z) > u(rD) u(rD) otherwise u(rR) ← u(rD $Y) mod u($Z) if u($Z) > u(rD) u($Y) otherwise The special register rD is prepended to the register $Y to form a 128 bit number. This number is divided by $Z and the result is stored in $X. The remainder is stored in special register rR. If, however, rD ≥ $Z, then the result of the division would be greater than 264 and the quotient will not be computed. Instead, rD is stored in $X and $Y is stored in rR. In Donald Knuth's "The Art of Computer Programming", Volume 2, "Seminumerical Algorithms", Chapter 4.3.1 will explain how to use this instruction to implement division of high-precision numbers with 128 bit or more.

All instructions exist in two variants. The second operand can either be a register $Z or an immediate value Z.

Timing:
ADDU: 1υ
SUBU: 1υ
MULU: 10υ
DIVU: 60υ

Description:

These instructions perform arithmetic operations on unsigned numbers. They never cause overflow or other exceptions, not even if dividing by zero.

ADDU:	The sum ($Y + $Z) mod 264 or ($Y + Z) mod 264 is placed into register $X. These instructions are the same as ADD $X,$Y,$Z|Z commands except that no test for oveflow is made. (Overflow could be detected if desired by using the command CMPU ovflo,$X,$Y after addition, where CMPU means "compare unsigned")
SUBU:	The difference ($Y - $Z) mod 264 or ($Y - Z) mod 264 is placed into register $X. These two instructions are the same as SUB $X,$Y,$Z|Z except that no test for overflow is made.
MULU:	The lower 64 bits of the unsigned 128-bit product of register $Y and either register $Z or Z are placed in register $X, and the upper 64 bits are placed in the special himult register rH. (Consider: Immediate multiplication by powers of 2 can be done more rapidly with the SLU instruction, if the upper half is not needed. Furthermore, an instruction like 4ADDU $X,$Y,$Y is faster than MULU $X,$Y,5)
DIVU:	The unsigned 128-bit number obtained by prefixing the special dividend register rD to the contents of register $Y is divided either by the unsigned number in register $Z or by the unsigned byte Z, and the quotient is placed in register $X. The remainder is placed in the remainder register rR. However, if rD is greater than or equal to the divisor (and in particular if the divisor is zero), then $X is set to rD and rR is set to $Y. (Unsigned arithmetic never signals an exceptional condition, even when dividing by zero.) If rD is zero, unsigned division by z = 2t gives exactly the same quotient as shifting right t via the SRU command, and exactly the same remainder as anding with z - 1 via the AND command.

See also:

Signed Arithmetic.